The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 12, 2016
Filed:
Feb. 11, 2014
Applicant:
Globalfoundries Inc., Grand Cayman, KY;
Inventors:
Fenton R. McFeely, Ossining, NY (US);
Chih-Chao Yang, Glenmont, NY (US);
Assignee:
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/09 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H05K 1/09 (2013.01); H01L 21/76846 (2013.01); H01L 21/76864 (2013.01); H01L 21/76873 (2013.01); H01L 21/76883 (2013.01); H01L 23/53238 (2013.01); H01L 2221/1089 (2013.01); H01L 2924/0002 (2013.01); Y10T 29/49126 (2015.01); Y10T 29/49165 (2015.01);
Abstract
Techniques for improving the conductivity of copper (Cu)-filled vias are provided. In one aspect, a method of fabricating a Cu-filled via is provided. The method includes the following steps. A via is etched in a dielectric. The via is lined with a diffusion barrier. A thin ruthenium (Ru) layer is conformally deposited onto the diffusion barrier. A thin seed Cu layer is deposited on the Ru layer. A first anneal is performed to increase a grain size of the seed Cu layer. The via is filled with additional Cu. A second anneal is performed to increase the grain size of the additional Cu.