The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 12, 2016

Filed:

Aug. 03, 2015
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Yi-Wei Chiu, Kaohsiung, TW;

Hsin-Yi Tsai, Tainan, TW;

Tzu-Chan Weng, Kaohsiung, TW;

Li-Te Hsu, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/062 (2012.01); H01L 31/113 (2006.01); H01L 31/119 (2006.01); H01L 27/088 (2006.01); H01L 29/78 (2006.01); H01L 29/49 (2006.01); H01L 21/8238 (2006.01); H01L 21/28 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 29/51 (2006.01); H01L 21/265 (2006.01);
U.S. Cl.
CPC ...
H01L 27/088 (2013.01); H01L 21/28247 (2013.01); H01L 21/823814 (2013.01); H01L 29/495 (2013.01); H01L 29/4916 (2013.01); H01L 29/4966 (2013.01); H01L 29/4975 (2013.01); H01L 29/517 (2013.01); H01L 29/66575 (2013.01); H01L 29/78 (2013.01); H01L 21/0214 (2013.01); H01L 21/02329 (2013.01); H01L 21/26586 (2013.01); H01L 29/51 (2013.01);
Abstract

A semiconductor device includes a silicon-based substrate, a gate structure and a laminated sacrificial oxide layer. The gate structure is on the silicon-based substrate. The laminated sacrificial oxide layer has a first portion on the silicon-based substrate and a second portion conformal to the gate structure, in which a first thickness of the first portion is substantially the same as a second thickness of the second portion. The laminated sacrificial oxide layer includes a native oxide layer and a silicon oxy-nitride layer. The native oxide layer is on the silicon-based substrate and conformal to the gate structure. The silicon oxy-nitride layer is conformal to the native oxide layer.


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