The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 12, 2016
Filed:
Jun. 22, 2015
Nxp B.v., Eindhoven, NL;
Shun Tik Yeung, Hong Kong, HK;
Pompeo V. Umali, Ma Wan, HK;
Chi Ho Leung, Kwun Tong, HK;
Kan Wae Lam, Ta Kwu Ling, HK;
Chi Ling Shum, Hong Kong, HK;
NXP B.V., Eindhoven, NL;
Abstract
Consistent with an example embodiment, a semiconductor device comprises a device die having bond pads providing connection to device die circuitry. The semiconductor device includes a QFN package (quad-flat-pack no-leads) built-up substrate lead frame having, a sub-structure of I/O terminals and a die attach area, the I/O terminals and die attach area enveloped in a molding compound; the die attach area has exposed areas to facilitate device die attachment thereon and the terminal I/O terminals provide connection to the device die bond pads. I/O terminals are electrically coupled with one another and to the die attach area with connection traces. The coupled I/O terminals and connection traces facilitate electroplating of exposed vertical surfaces of the I/O terminals during assembly, said connection traces being severed after assembly. Molding compound encapsulates the device die on the built-up substrate lead frame. The exposed vertical surfaces of the I/O terminals enhance the solderability of the assembled QFN device during placement onto a printed circuit board.