The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 12, 2016
Filed:
Jul. 30, 2015
Stmicroelectronics SA, Montrouge, FR;
Stmicroelectronics International N.v., Amsterdam, NL;
Christophe Lecocq, Varces, FR;
Kaya Can Akyel, Grenoble, FR;
Amit Chhabra, Delhi, IN;
Dibya Dipti, Greater Noida, IN;
STMicroelectronics SA, Montrouge, FR;
STMicroelectronics International N.V., Amsterdam, NL;
Abstract
An SRAM cell is formed of FDSOI-type NMOS and PMOS transistors. A doped well extends under the NMOS and PMOS transistors and is separated therefrom by an insulating layer. A bias voltage is applied to the doped well. The applied bias voltage is adjusted according to a state of the memory cell. For example, a temperature of the memory cell is sensed and the bias voltage adjusted as a function of the sensed temperature. The adjustment in the bias voltage is configured so that threshold voltages of the NMOS and PMOS transistors are substantially equal to n and p target threshold voltages, respectively.