The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2016

Filed:

Aug. 11, 2015
Applicant:

Stmicroelectronics, Inc., Coppell, TX (US);

Inventors:

Ronald K. Sampson, Lagrangeville, NY (US);

Nicolas Loubet, Guilderland, NY (US);

Assignee:

STMICROELECTRONICS, INC., Coppell, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/84 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 21/845 (2013.01); H01L 21/0257 (2013.01); H01L 21/02529 (2013.01); H01L 21/02532 (2013.01); H01L 21/28035 (2013.01); H01L 29/0649 (2013.01); H01L 29/0653 (2013.01); H01L 29/1083 (2013.01); H01L 29/6656 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 29/7848 (2013.01); H01L 29/0673 (2013.01);
Abstract

A semiconductor material is patterned to define elongated fins insulated from an underlying substrate. A polysilicon semiconductor material is deposited over and in between the elongated fins, and is patterned to define elongated gates extending to perpendicularly cross over the elongated fins at a transistor channel. Sidewall spacers are formed on side walls of the elongated gates. Portions of the elongated fins located between the elongated gates are removed, along with the underlying insulation, to expose the underlying substrate. One or more semiconductor material layers are then epitaxially grown from the underlying substrate at locations between the elongated gates. The one or more semiconductor material layers may include an undoped epi-layer and an overlying doped epi-layer. The epitaxial material defines a source or drain of the transistor.


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