The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2016

Filed:

Nov. 08, 2013
Applicants:

Gennady Goltman, Haifa, IL;

Yongping Fan, Portland, OR (US);

Kuan-yueh Shen, Hillsboro, OR (US);

Inventors:

Gennady Goltman, Haifa, IL;

Yongping Fan, Portland, OR (US);

Kuan-Yueh Shen, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/00 (2006.01); H03L 7/08 (2006.01); H03L 7/085 (2006.01); H03L 7/089 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0802 (2013.01); H03L 7/085 (2013.01); H03L 7/089 (2013.01); H03L 7/0895 (2013.01);
Abstract

Described is an apparatus to lower power of a charge pump. The apparatus comprises: a first delay unit to receive a reference clock, the first delay unit to provide a delayed reference clock to a first sequential unit; a second delay unit to receive a feedback clock, the second delay unit to provide a delayed feedback clock to a second sequential unit; a first logic unit to receive the reference and feedback clocks, the logic unit to perform a logical OR operation on the received reference and feedback clocks, and to generate a trigger signal for a third sequential unit; and a second logic unit to receive outputs of first and second sequential units, and to generate an output coupled to the third sequential unit.


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