The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2016

Filed:

Oct. 15, 2015
Applicant:

Shinkawa Ltd., Tokyo, JP;

Inventors:

Shinji Kumamoto, Tokyo, JP;

Naoki Sekine, Tokyo, JP;

Motoki Nakazawa, Tokyo, JP;

Yasuo Nagashima, Tokyo, JP;

Assignee:

SHINKAWA LTD., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 25/07 (2006.01); H01L 25/18 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/85 (2013.01); H01L 24/48 (2013.01); H01L 24/78 (2013.01); H01L 25/065 (2013.01); H01L 25/07 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/4809 (2013.01); H01L 2224/48147 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/48228 (2013.01); H01L 2224/48455 (2013.01); H01L 2224/48465 (2013.01); H01L 2224/78301 (2013.01); H01L 2224/85181 (2013.01); H01L 2224/85205 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/06562 (2013.01);
Abstract

A semiconductor device includes a common wire that sequentially connects three or more pads; bonding portions at which a side surface of the wire is bonded to the pads; and looping portions looped from the bonding portions onto the other pads adjacent to the pads, the bonding portions and the looping portions are formed alternately. When the pads are recessed from the surface of semiconductor chips, the common wire is crushed to a thickness greater than the recess depth of the pads to be made into a flat shape. Thus, on the semiconductor device, wire connection is performed with a smaller bonding count while reducing damage to the semiconductor chips, and at the same time bonding is performed efficiently to the electrodes recessed from the surface of the semiconductor chips.


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