The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 21, 2016
Filed:
Aug. 27, 2008
Gen Pei, Yorktown Heights, NY (US);
Scott D. Luning, Poughkeepsie, NY (US);
Johannes Van Meer, Newburgh, NY (US);
Gen Pei, Yorktown Heights, NY (US);
Scott D. Luning, Poughkeepsie, NY (US);
Johannes van Meer, Newburgh, NY (US);
ADVANCED MICRO DEVICES, INC., Sunnyvale, CA (US);
Abstract
A CMOS circuit is provided that includes a PMOS transistor, an NMOS transistor adjacent the PMOS transistor in a channel width direction, a compressive stress liner overlying the PMOS transistor, and a tensile stress liner overlying the NMOS transistor. A portion of the compressive stress liner and a portion of the tensile stress liner are in a stacked configuration, and an overlap region of the compressive stress liner and the tensile stress liner is sufficient to result in an enhanced transverse stress in the compressive stress liner or the tensile stress liner.