The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2016
Filed:
Sep. 05, 2014
Applicant:
Innolux Corporation, Miao-Li County, TW;
Inventors:
Hsin-Hung Lin, Miao-Li County, TW;
Jung-Fang Chang, Miao-Li County, TW;
Ker-Yih Kao, Miao-Li County, TW;
Assignee:
INNOLUX CORPORATION, Miao-Li County, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 29/786 (2006.01); H01L 29/66 (2006.01); H01L 27/12 (2006.01); H01L 23/31 (2006.01); H01L 23/48 (2006.01); H01L 29/417 (2006.01); H01L 29/51 (2006.01); H01L 21/441 (2006.01); H01L 21/47 (2006.01); H01L 21/471 (2006.01); H01L 21/4757 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78606 (2013.01); H01L 21/441 (2013.01); H01L 21/47 (2013.01); H01L 21/471 (2013.01); H01L 21/47573 (2013.01); H01L 23/3171 (2013.01); H01L 23/481 (2013.01); H01L 27/1225 (2013.01); H01L 27/1259 (2013.01); H01L 29/41733 (2013.01); H01L 29/41775 (2013.01); H01L 29/517 (2013.01); H01L 29/518 (2013.01); H01L 29/66742 (2013.01); H01L 29/66969 (2013.01); H01L 29/7869 (2013.01); H01L 2924/0002 (2013.01);
Abstract
Disclosed is a thin film transistor including a gate electrode on a substrate. A gate dielectric layer is disposed on the gate electrode and the substrate, and source/drain electrodes are disposed on the gate dielectric layer overlying two edge parts of the gate electrode. A channel layer is disposed on the gate dielectric layer overlying a center part of the gate electrode, and the channel region contacts the source/drain electrodes. An insulating capping layer overlies the channel layer, wherein the channel layer includes an oxide semiconductor.