The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2016

Filed:

Feb. 12, 2014
Applicant:

Kabushiki Kaisha Toshiba, Minato-ku, JP;

Inventors:

Takamasa Okawa, Yokkaichi, JP;

Takayuki Tsukamoto, Yokkaichi, JP;

Yoichi Minemura, Yokkaichi, JP;

Hiroshi Kanno, Yokkaichi, JP;

Atsushi Yoshida, Yokkaichi, JP;

Hideyuki Tabata, Yokkaichi, JP;

Assignee:

KABUSHIKI KAISHA TOSHIBA, Minato-ku, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); G11C 13/00 (2006.01); H01L 45/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/249 (2013.01); G11C 13/0002 (2013.01); G11C 13/0026 (2013.01); G11C 13/0069 (2013.01); H01L 27/2454 (2013.01); G11C 2013/0073 (2013.01); G11C 2213/71 (2013.01); H01L 45/04 (2013.01); H01L 45/12 (2013.01); H01L 45/1226 (2013.01); H01L 45/146 (2013.01);
Abstract

This semiconductor memory device comprises a memory cell array that includes: a plurality of first lines; a plurality of second lines intersecting the plurality of first lines; a plurality of memory cells each disposed at an intersection of the plurality of first lines and the plurality of second lines and including a variable resistance element; and a select transistor respectively connected to an end of the plurality of first lines. The select transistor includes a gate electrode, a gate insulating film, and a conductive layer. Moreover, one end of that conductive layer is connected to the end of the first line, and a non-linear resistance layer configured from a non-linear material is connected between the first line and the conductive layer.


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