The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2016

Filed:

Feb. 18, 2015
Applicant:

Intermolecular, Inc., San Jose, CA (US);

Inventors:

Thomas R. Boussie, Santa Clara, CA (US);

David E. Lazovsky, Los Gatos, CA (US);

Sandra G. Malhotra, Fort Collins, CO (US);

Assignee:

Intermolecular, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 21/768 (2006.01); B82Y 30/00 (2011.01); H01L 21/02 (2006.01); H01L 21/288 (2006.01); H01L 21/31 (2006.01);
U.S. Cl.
CPC ...
H01L 21/7685 (2013.01); B82Y 30/00 (2013.01); H01L 21/0217 (2013.01); H01L 21/02118 (2013.01); H01L 21/02167 (2013.01); H01L 21/02203 (2013.01); H01L 21/288 (2013.01); H01L 21/31 (2013.01); H01L 21/76834 (2013.01);
Abstract

A masking layer is formed on a dielectric region of an electronic device so that, during subsequent formation of a capping layer on electrically conductive regions of the electronic device that are separated by the dielectric region, the masking layer inhibits formation of capping layer material on or in the dielectric region. The capping layer can be formed selectively on the electrically conductive regions or non-selectively; in either case, capping layer material formed over the dielectric region can subsequently be removed, thus ensuring that capping layer material is formed only on the electrically conductive regions. Silane-based materials, can be used to form the masking layer. The capping layer can be formed of an conductive material, a semiconductor material, or an insulative material, and can be formed using any appropriate process, including conventional deposition processes such as electroless deposition, chemical vapor deposition, physical vapor deposition or atomic layer deposition.


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