The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2016
Filed:
Jul. 09, 2013
Applicant:
Nvidia Corporation, Santa Clara, CA (US);
Inventor:
Leilei Zhang, Sunnyvale, CA (US);
Assignee:
NVIDIA Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/445 (2006.01); G11C 11/34 (2006.01); H05K 3/24 (2006.01); H01L 21/48 (2006.01); H05K 3/06 (2006.01);
U.S. Cl.
CPC ...
G11C 11/34 (2013.01); H01L 21/48 (2013.01); H05K 3/242 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/12044 (2013.01); H01L 2924/15311 (2013.01); H05K 3/067 (2013.01); H05K 2203/175 (2013.01);
Abstract
An integrated circuit package includes a packaging substrate with an electrical connection pad formed thereon and an integrated circuit die coupled to the electrical connection pad. The electrical connection pad includes an electroplated surface finish layer, but does not include an electrical trace configured as a plating tail. Because the electrical connection pad is free of a plating tail, signal degradation caused by the presence of plating tails in the integrated circuit package is avoided.