The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 07, 2016
Filed:
Dec. 14, 2011
James E. Jaussi, Hillsboro, OR (US);
Stephen R. Mooney, Mapleton, UT (US);
Howard L. Heck, Hillsboro, OR (US);
Bruce E. Pederson, Beaverton, OR (US);
Bryan K. Casper, Portland, OR (US);
James E. Jaussi, Hillsboro, OR (US);
Stephen R. Mooney, Mapleton, UT (US);
Howard L. Heck, Hillsboro, OR (US);
Bruce E. Pederson, Beaverton, OR (US);
Bryan K. Casper, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Methods and systems may include an input/output (IO) interface that has an integrated buffer, a housing and a substrate disposed within the housing. The substrate may include a first side, a second side and a connection edge. The integrated buffer can be coupled to at least one of the first side and the second side of the substrate. A plurality of rows of contacts may be coupled to the first side of the substrate. Each row of contacts can be stacked substantially parallel to the connection edge. The substrate may have power outputs coupled thereto and the integrated buffer can include a voltage regulator that has a supply output coupled to the power outputs.