The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 24, 2016
Filed:
Jun. 12, 2014
Intel Corporation, Santa Clara, CA (US);
Shaowu Huang, Steilacoom, WA (US);
John J. Abbott, Dupont, WA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments of the present disclosure are directed toward techniques and configurations for electrical signal absorption in an interconnect stub. In one instance, a printed circuit board (PCB) assembly may comprise a substrate and an interconnect (such as a via) formed in the substrate to route an electrical signal within the PCB. The interconnect may include a stub formed on the interconnect. At least a portion of the stub may be covered with an absorbing material to at least partially absorb a portion of the electric signal that is reflected by the stub. The absorbing material may be selected such that its dielectric loss tangent is greater than one, for a frequency range of a frequency of the reflected portion of the electric signal. A dielectric constant of the absorbing material may be inversely proportionate to the frequency of the reflected electric signal. Other embodiments may be described and/or claimed.