The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2016

Filed:

Nov. 12, 2014
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Mudasir Shafat Kawoosa, Srinagar, IN;

Rajesh Kumar Mittal, Bangalore, IN;

Sreenath Narayanan Potty, Trivandrum, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 31/3177 (2006.01); G11C 29/12 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01); G01R 31/28 (2013.01); G11C 29/12 (2013.01);
Abstract

Systems and methods for enabling scan testing of device-under-test (DUT) are disclosed. In an embodiment, a test system for scan testing the DUT, including P scan input ports and Q scan output ports, includes tester and adapter module. Tester operates at clock frequency Fand includes M tester Input/Output (I/O) ports for providing M scan inputs and N tester I/O ports for receiving N scan outputs at F. Adapter module is coupled to tester and configured to receive M scan inputs at Fand, in response, provide P scan inputs at clock frequency Fto P scan input ports, and to receive Q scan outputs at Ffrom Q scan output ports and, in response, provide N scan outputs at Fto N tester I/O ports, where ratio of M to P equals ratio of N to Q, and where each of M, N, P and Q are positive integers.


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