The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 17, 2016

Filed:

Feb. 08, 2013
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Hsi-Yu Kuo, Hsin-Chu, TW;

Chi-Kuang Chen, Taipei, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/74 (2006.01); H01L 29/66 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 29/74 (2013.01); H01L 27/0262 (2013.01); H01L 29/66363 (2013.01);
Abstract

Methods and apparatus are disclosed for ESD protection circuits. An ESD protection circuit may comprise a lateral silicon controlled rectifier (SCR) circuit and a lateral PNP bipolar junction transistor (BJT) circuit. The SCR circuit comprises a first region on an n type buried layer (NBL), a second region on the NBL, a fourth region formed within the first region, and a fifth region formed within the second region. The PNP circuit comprises the second region on the NBL, a third region on the NBL, and a sixth region formed within the third region. The first region is the 1N node of the SCR circuit and is connected with the base of the PNP circuit, which is the third region, by the NBL, and the 2P node of the SCR circuit is shared with the collector of the PNP circuit.


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