The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 17, 2016
Filed:
Mar. 31, 2014
Applicant:
Rama I. Hegde, Austin, TX (US);
Inventor:
Rama I. Hegde, Austin, TX (US);
Assignee:
FREESCALE SEMICONDUCTOR, INC., Austin, TX (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/49 (2013.01); H01L 24/48 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/45015 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/85399 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01079 (2013.01);
Abstract
A semiconductor structure is disclosed, wherein for a certain percentage of a plurality of bonding pads, the bonding pad metal may include a plurality of grains, wherein the plurality of grains may include a bonding grain. The bonding grain may have a width substantially the same as the width of the wire bonded to the bonding pad such that no grain boundaries are present below the wire bond.