The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 10, 2016
Filed:
Jun. 25, 2012
Moises Cases, Austin, TX (US);
Bradley D. Herrman, Cary, NC (US);
Bhyrav M. Mutnury, Austin, TX (US);
Nam H. Pham, Round Rock, TX (US);
Terence Rodrigues, Austin, TX (US);
Moises Cases, Austin, TX (US);
Bradley D. Herrman, Cary, NC (US);
Bhyrav M. Mutnury, Austin, TX (US);
Nam H. Pham, Round Rock, TX (US);
Terence Rodrigues, Austin, TX (US);
Lenovo Enterprise Solutions (Singapore) Pte. Ltd., Singapore, SG;
Abstract
In a particular embodiment, a method of manufacturing a printed circuit board ('PCB') with reduced dielectric loss includes fabricating conductive traces disposed upon layers of dielectric material; and fabricating the layers of dielectric material, including core layers and prepreg layers, with one or more of the layers of dielectric material including pockets of air that reduce an overall relative dielectric constant of the PCB. In the particular embodiment, the conductive traces are disposed upon layers of the dielectric material orthogonally with respect to one another and the pockets of air are aligned at an angle of 45 degrees with respect to the conductive traces.