The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2016

Filed:

Jun. 02, 2015
Applicant:

Sandisk Technologies Inc., Plano, TX (US);

Inventors:

Hong-Yan Chen, Sunnyvale, CA (US);

Yingda Dong, San Jose, CA (US);

Charles Kwong, Redwood City, CA (US);

Assignee:

SanDisk Technologies Inc., Plano, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 16/04 (2006.01); G11C 16/34 (2006.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3427 (2013.01); G11C 16/26 (2013.01); G11C 16/3459 (2013.01);
Abstract

Read disturb due to hot electron injection is reduced in a 3D memory device by controlling the magnitude and timing of word line and select gate ramp down voltages at the end of a sensing operation. In an example read operation, the magnitude of a selected word line voltage is increased to be equal to pass voltages of unselected word lines, and the selected and unselected word line are ramped down at the same time, to avoid creating a channel gradient. In an example verify operation, the above procedure can be followed when the selected word line is at a source-side or middle range among all word lines. When the selected word line is at a drain-side among all word lines, a source-side select gate can be ramped down before the selected word line and a drain-side select gate can be ramped down after the selected word line.


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