The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2016

Filed:

Oct. 03, 2014
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Ya-Huei Huang, Tainan, TW;

Shen-De Wang, Hsinchu County, TW;

Wen-Chung Chang, Hsinchu, TW;

Feng-Ji Tsai, Hsinchu, TW;

Chien-Hung Chen, Hsin-Chu, TW;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 29/792 (2006.01); H01L 29/66 (2006.01); H01L 21/28 (2006.01); H01L 29/423 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66833 (2013.01); H01L 21/28282 (2013.01); H01L 29/4234 (2013.01); H01L 29/513 (2013.01); H01L 29/518 (2013.01); H01L 29/6659 (2013.01); H01L 29/792 (2013.01);
Abstract

A method for manufacturing a non-volatile memory structure includes providing a substrate having a gate structure, performing a first oxidation process to form a first SiO layer at least covering a bottom corner of the conductive layer, performing a first etching process to remove the first SiO layer and a portion of the dielectric layer to form a cavity, performing a second oxidation process to form a second SiO layer covering sidewalls of the cavity and a third SiO layer covering a surface of the substrate, forming a first SiN layer filling in the cavity and covering the gate structure on the substrate, and removing a portion of the first SiN layer to form a SiN structure including a foot portion filling in the cavity and an erection portion upwardly extended from the foot portion, and the erection portion covering sidewalls of the gate structure.


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