The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2016

Filed:

Aug. 22, 2013
Applicant:

Renesas Electronics Corporation, Kawasaki-shi, Kanagawa, JP;

Inventors:

Hiroshi Sunamura, Kanagawa, JP;

Kishou Kaneko, Kanagawa, JP;

Yoshihiro Hayashi, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 21/822 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 27/06 (2006.01); H01L 27/12 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 27/088 (2013.01); H01L 21/8221 (2013.01); H01L 23/522 (2013.01); H01L 23/53295 (2013.01); H01L 27/0688 (2013.01); H01L 27/1225 (2013.01); H01L 29/66477 (2013.01); H01L 2924/0002 (2013.01); H01L 2924/00011 (2013.01);
Abstract

Provided is an in-wiring-layer active element (component) which allows for electrical isolation between a gate electrode and a channel in a top gate structure. A semiconductor device includes a first wiring layer, a second wiring layer, and a semiconductor element. The first wiring layer has a first interlayer insulating layer, and a first wire embedded in the first interlayer insulating layer. The second wiring layer has a second interlayer insulating layer, and second wires embedded in the second interlayer insulating layer. The semiconductor element is provided at least in the second wiring layer. The semiconductor element includes a semiconductor layer provided in the second wiring layer, a gate insulating film provided in contact with the semiconductor layer, a gate electrode provided on the opposite side of the semiconductor layer via the first gate insulating film, and a first side wall film provided over a side surface of the semiconductor layer.


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