The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 26, 2016
Filed:
Dec. 27, 2012
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Kuan-Yu Chen, Hillsboro, OR (US);
Howard L. Heck, Hillsboro, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/11 (2006.01); H05K 1/03 (2006.01); H05K 3/00 (2006.01); H01R 12/57 (2011.01); H05K 1/02 (2006.01); H01R 12/58 (2011.01);
U.S. Cl.
CPC ...
H05K 1/11 (2013.01); H01R 12/57 (2013.01); H01R 12/58 (2013.01); H05K 1/025 (2013.01); H05K 1/111 (2013.01); H05K 1/115 (2013.01); H05K 2201/094 (2013.01); H05K 2201/09409 (2013.01); H05K 2201/10189 (2013.01); H05K 2201/10659 (2013.01); Y10T 29/49124 (2015.01);
Abstract
A universal serial bus hybrid footprint design is described herein. The design includes an outer row of one or more surface mount technology (SMT) contacts and an inner row of one or more printed through holes (PTH). The hybrid footprint design enables a data through put of at least 10 Gbps.