The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2016

Filed:

Aug. 30, 2014
Applicant:

Stmicroelectronics International N.v., Amsterdam, NL;

Inventors:

Vikas Rana, Noida, IN;

Ganesh Raj R, New Delhi, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/03 (2006.01); H03L 1/00 (2006.01); H03L 7/14 (2006.01); H03L 7/18 (2006.01); H03L 7/093 (2006.01); H03L 7/089 (2006.01); H03L 7/081 (2006.01); H03L 7/099 (2006.01);
U.S. Cl.
CPC ...
H03L 1/00 (2013.01); H03K 3/0315 (2013.01); H03K 3/0322 (2013.01); H03L 7/0812 (2013.01); H03L 7/0891 (2013.01); H03L 7/0895 (2013.01); H03L 7/093 (2013.01); H03L 7/0995 (2013.01); H03L 7/0997 (2013.01); H03L 7/148 (2013.01); H03L 7/18 (2013.01);
Abstract

A clock signal generation circuit configured to generate the clock signal having a frequency that is maintained across variations in a number of operating conditions, such as changes in supply voltage, temperature and processing time. In an embodiment, the frequency spread of the generated clock signal of a PVT-compensated CMOS ring oscillator is configured to compensate for variations in the supply voltage, as well as for variations in process and temperature via a process and temperature compensation circuit. The PVT-compensated CMOS ring oscillator includes a regulated voltage supply circuit to generate a supply voltage that is resistant to variations due to changes in the overall supply voltage.


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