The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2016

Filed:

Dec. 16, 2014
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Adebabay M. Bekele, San Jose, CA (US);

Parag Upadhyaya, Los Gatos, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 5/12 (2006.01);
U.S. Cl.
CPC ...
H03B 5/1253 (2013.01); H03B 5/1215 (2013.01); H03B 5/1265 (2013.01); H03B 5/1278 (2013.01); H03B 2201/0208 (2013.01); H03B 2201/031 (2013.01);
Abstract

Voltage-controlled oscillation is described. In an apparatus therefor, an inductor has a tap and has or is coupled to a positive-side output node and a negative side output node. The tap is coupled to receive a first current. A coarse grain capacitor array is coupled to the positive-side output node and the negative side output node and is coupled to respectively receive select signals. A varactor is coupled to the positive-side output node and the negative side output node and is coupled to receive a control voltage. The varactor includes MuGFETs. A transconductance cell is coupled to the positive-side output node and the negative side output node, and the transconductance cell has a common node. A frequency scaled resistor network is coupled to the common node and is coupled to receive the select signals for a resistance for a path for a second current.


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