The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 26, 2016
Filed:
May. 08, 2014
Applicant:
SK Hynix Inc., Icheon, KR;
Inventors:
Ki Jun Sung, Cheongju, KR;
Seung Jee Kim, Seongnam, KR;
Jong Hyun Nam, Seoul, KR;
Sang Yong Lee, Yongin, KR;
Young Geun Yoo, Bucheon, KR;
Assignee:
SK HYNIX INC., Icheon, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 23/00 (2006.01); H01L 25/03 (2006.01); H05K 1/18 (2006.01); H05K 3/46 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0652 (2013.01); H01L 24/09 (2013.01); H01L 24/20 (2013.01); H01L 24/73 (2013.01); H01L 25/03 (2013.01); H05K 1/185 (2013.01); H05K 3/4697 (2013.01); H01L 23/5389 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/19 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 2224/09134 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/131 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/2101 (2013.01); H01L 2224/215 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73209 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/73267 (2013.01); H01L 2225/06541 (2013.01); H01L 2924/15153 (2013.01); H01L 2924/181 (2013.01); H05K 2201/1053 (2013.01); H05K 2201/10515 (2013.01); H05K 2201/10674 (2013.01); H05K 2201/10734 (2013.01);
Abstract
An embedded package includes a first semiconductor chip embedded in a package substrate, a second semiconductor chip disposed over a first surface of the package substrate, and a group of external connection joints disposed on the first surface of the package substrate and between a sidewall of the second semiconductor chip and an edge of the embedded package. Related memory cards and related electronic systems are also provided.