The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2016

Filed:

Jan. 07, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Vedvyas Shanbhogue, Austin, TX (US);

Jason W. Brandt, Austin, TX (US);

Jeff Wiedemeier, Austin, TX (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/44 (2006.01); G06F 21/62 (2013.01); G06F 11/07 (2006.01); G01R 31/3177 (2006.01); G06F 11/36 (2006.01); G01R 31/3185 (2006.01); G01R 31/317 (2006.01); G06F 21/71 (2013.01); G06F 21/74 (2013.01);
U.S. Cl.
CPC ...
G06F 21/62 (2013.01); G01R 31/3177 (2013.01); G01R 31/31719 (2013.01); G01R 31/318588 (2013.01); G06F 11/0727 (2013.01); G06F 11/3656 (2013.01); G06F 21/71 (2013.01); G06F 21/74 (2013.01);
Abstract

Embodiments of an invention for protecting information processing system secrets from debug attacks are disclosed. In one embodiment, a processor includes storage, a debug unit, and a test access port. The debug unit is to receive a policy from a debug aggregator. The policy is based on a value of a first fuse and has a production mode corresponding to a production value of the first fuse and a debug mode corresponding to a debug value of the fuse. The test access port is to provide access to the storage using a debug command in the debug mode and to prevent access to the storage using the debug command in the production mode.


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