The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 2016

Filed:

Sep. 25, 2012
Applicants:

Rinkle Jain, Portland, OR (US);

Yi-chun Shih, Hillsboro, OR (US);

Vaibhav Vaidya, Portland, OR (US);

Inventors:

Rinkle Jain, Portland, OR (US);

Yi-Chun Shih, Hillsboro, OR (US);

Vaibhav Vaidya, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/00 (2006.01); G05F 1/565 (2006.01);
U.S. Cl.
CPC ...
G05F 1/565 (2013.01);
Abstract

An output stage has an input supply node to receive an input power supply and an output node to provide an output supply to a load. An amplifier is used to control current strength of the output stage according to the output supply and a reference voltage. A hysteresis unit is used to monitor the output supply and operable to control the current strength of the output stage according to a voltage level of the output supply. In one embodiment, a plurality of charge pumps are used to adjust current strength of the output stage. A logic unit is used to monitor the output supply and operable to control the plurality of charge pumps according to a voltage level of the output supply and one or more reference voltages.


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