The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 19, 2016

Filed:

Sep. 28, 2015
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsin-Chu, TW;

Inventors:

Yu-Jung Chang, Zhubei, TW;

C. R. Hsu, New Taipei, TW;

Chin-Chang Hsu, Banqiao, TW;

Wen-Ju Yang, Hsinchu, TW;

Chung-min Fu, Chungli, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); H01L 27/118 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11803 (2013.01); G06F 17/5072 (2013.01); H01L 27/0207 (2013.01);
Abstract

One or more techniques or systems for mitigating density gradients between two or more regions of cells are provided herein. In some embodiments, an array of cells is associated with a dummy region. For example, the array of cells includes an array of gates and an array of OD regions. In some embodiments, the array of gates includes a first set of gates associated with a first gate dimension and a second set of gates associated with a second gate dimension. In some embodiments, the array of OD regions includes a first set of OD regions associated with a first OD dimension and a second set of OD regions associated with a second OD dimension. In this manner, at least one of a pattern density, gate density, or OD density is customized to a region associated with active cells, thus mitigating density gradients between respective regions.


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