The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 2016
Filed:
Dec. 29, 2011
Jose A. Vargas, Rescue, CA (US);
Mohan J. Kumar, Aloha, OR (US);
James B. Crossland, Banks, OR (US);
Murugasamy K. Nachimuthu, Beaverton, OR (US);
Theodros Yigzaw, Sherwood, OR (US);
Jose A. Vargas, Rescue, CA (US);
Mohan J. Kumar, Aloha, OR (US);
James B. Crossland, Banks, OR (US);
Murugasamy K. Nachimuthu, Beaverton, OR (US);
Theodros Yigzaw, Sherwood, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
In some implementations, a processor may include a machine check architecture having a plurality of error reporting registers able to receive data for machine check errors. A summary register may include a plurality of settable locations that each represents at least one of the error reporting registers. One or more of the settable locations in the summary register may be set to indicate whether one or more of the error reporting registers maintain data for a machine check error. Accordingly, when a machine check error occurs, the summary register may be accessed to identify if any error reporting registers in a processor's view contain valid error data, rather than having to read each of the error reporting registers in the processor's view.