The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 2016
Filed:
Sep. 07, 2010
Klaus-dieter Hilliges, Shanghai, CN;
Jia-wei Lin, Shanghai, CN;
Duncan Gurley, Cupertino, CA (US);
Jim-my Jin, Shanghai, CN;
Eric Vokerink, Cupertino, CA (US);
Klaus-Dieter Hilliges, Shanghai, CN;
Jia-Wei Lin, Shanghai, CN;
Duncan Gurley, Cupertino, CA (US);
Jim-my Jin, Shanghai, CN;
Eric Vokerink, Cupertino, CA (US);
ADVANTEST CORPORATION, Tokyo, JP;
Abstract
In one embodiment, a semiconductor test control system includes a computer system having a plurality of hardware resources; a hypervisor installed on the computer system; and a test floor controller installed on the computer system. The hypervisor virtualizes the hardware resources and provides each of at least one virtual appliance with access to a respective virtual set of the hardware resources. Each virtual set of the hardware resources places its respective virtual appliance in controlling communication with at least a first aspect of a semiconductor test system, thereby enabling the respective virtual appliance to test a respective type of semiconductor device. The test floor controller is in controlling communication with i) at least a second aspect of the semiconductor test system, and ii) each of the at least one virtual appliance.