The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 12, 2016
Filed:
Jan. 06, 2015
Texas Instruments Incorporated, Dallas, TX (US);
Kevin Lyne, Yantis, TX (US);
Kurt P. Wachtler, Richardson, TX (US);
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Abstract
A method for fabricating a semiconductor device provides a first chip having first terminals, a second chip having second terminals, and a third chip having third terminals. A first silicon interposer having first through silicon vias TSVs and a second silicon interposer having second TSVs is provided. The first TSVs are arrayed in a first, a second, and a third set. The first set is located in a first interposer region and matching the first terminals. The second set is located in a second interposer region and matching the second terminals. The third set is located in a third interposer region between the first and second regions and matching the TSVs of the second interposer and the third terminals. The first chip is aligned with the first set TSVs. The second chip is aligned with the second set TSVs. The second interposer is aligned with the third set TSVs. A solder of a first melting temperature is used.