The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 12, 2016
Filed:
Jan. 31, 2007
Edvard Kälvesten, Hägersten, SE;
Tomas Bauer, Kista, SE;
Thorbjörn Ebefors, Huddinge, SE;
Silex Microsystems AB, Jarfalla, SE;
Abstract
The invention relates to a method of making a starting substrate wafer for semiconductor engineering having electrical wafer through connections (). It comprises providing a wafer () having a front side and a back side and having a base of low resistivity silicon and a layer of high resistivity material on the front side. On the wafer there are islands of low resistivity material in the layer of high resistivity material. The islands are in contact with the silicon base material. Trenches are etched from the back side of the wafer but not all the way through the wafer to provide insulating enclosures defining the wafer through connections (). The trenches are filled with insulating material. Then the front side of the wafer is grinded to expose the insulating material to create the wafer through connections. Also there is provided a wafer substrate for making integrated electronic circuits and/or components, comprising a low resistivity silicon base () having a high resistivity top layer () suitable for semiconductor engineering, characterized by having low resistivity wafer through connections ().