The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2016

Filed:

Oct. 01, 2012
Applicant:

Aalto-korkeakoulusaatio, Aalto, FI;

Inventors:

Antti Haarahiltunen, Perttula, FI;

Hele Savin, Espoo, FI;

Marko Veli Yli-Koski, Helsinki, FI;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 31/18 (2006.01); H01L 31/0288 (2006.01); H01L 31/102 (2006.01); H01L 21/02 (2006.01); H01L 23/544 (2006.01); H01L 31/028 (2006.01); H01L 21/322 (2006.01); H01L 21/326 (2006.01);
U.S. Cl.
CPC ...
H01L 31/0288 (2013.01); H01L 21/326 (2013.01); H01L 21/3221 (2013.01); H01L 31/028 (2013.01); H01L 31/186 (2013.01); H01L 31/1864 (2013.01); Y02E 10/547 (2013.01); Y02P 70/521 (2015.11);
Abstract

A method () for decreasing an excess carrier induced degradation in a silicon substrate, includes providing () a charged insulation layer capable of retaining charge on the silicon substrate for generating a potential difference between the charged insulation layer and the silicon substrate, and heat treating () the silicon substrate for enabling an impurity causing the excess carrier induced degradation and being in the silicon substrate to diffuse due to the potential difference into a boundary of the silicon substrate and the insulation layer.


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