The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 2016

Filed:

Aug. 12, 2014
Applicant:

Globalfoundries, Inc., Grand Cayman, KY;

Inventors:

Jing Wan, Malta, NY (US);

Guillaume Bouche, Albany, NY (US);

Andy Wei, Queensbury, NY (US);

Shao Ming Koh, Clifton Park, NY (US);

Assignee:

GLOBALFOUNDRIES, INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/42392 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01);
Abstract

Integrated circuits and methods for producing the same are provided. A method for producing an integrated circuit includes forming a layered fin overlying a substrate, where the layered fin includes an SiGe layer and an Si layer. The SiGe layer and the Si layer alternate along a height of the layered fin. A dummy gate is formed overlying the substrate and the layered fin, and a source and a drain area formed in contact with the layered fin. The dummy gate is removed to expose the SiGe layer and the Si layer, and the Si layer is removed to produce an SiGe nanowire. A high K dielectric layer that encases the SiGe nanowire between the source and the drain is formed, and a replacement metal gate is formed so that the replacement metal gate encases the high K dielectric layer and the SiGe nanowire between the source and drain.


Find Patent Forward Citations

Loading…