The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 22, 2016
Filed:
Jul. 16, 2014
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/087 (2006.01); H03L 7/089 (2006.01); H03L 7/093 (2006.01); H03L 7/18 (2006.01); H03L 7/08 (2006.01); H03L 7/099 (2006.01); H03B 5/32 (2006.01); H02M 3/07 (2006.01);
U.S. Cl.
CPC ...
H03L 7/08 (2013.01); H02M 3/07 (2013.01); H03B 5/32 (2013.01); H03L 7/087 (2013.01); H03L 7/0893 (2013.01); H03L 7/093 (2013.01); H03L 7/099 (2013.01); H03L 7/18 (2013.01);
Abstract
A phase-locked loop circuit includes a phase detector, a charge pump, a capacitor, and a capacitor multiplier. The phase detector receives a reference frequency and a feedback frequency to generate a up/down signal. The charge pump, which includes a positive node and a negative node, receives the up/down signal to generate a first current. The capacitor is coupled to the negative node. The capacitor multiplier, coupled to the negative node, generates a second current which is the first current divided by a first scaling number.