The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 15, 2016
Filed:
Apr. 04, 2014
Applicant:
Synopsys, Inc., Mountain View, CA (US);
Inventor:
Mark David Lippett, Watlington, GB;
Assignees:
Synopsys, Inc., Mountain View, CA (US);
Fujitsu Semiconductor Limited, Kanagawa, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/00 (2006.01); G06F 9/30 (2006.01); G06F 9/40 (2006.01); G06F 15/80 (2006.01); G06F 1/32 (2006.01); G06F 9/48 (2006.01); G06F 9/46 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 15/80 (2013.01); G06F 1/3203 (2013.01); G06F 9/466 (2013.01); G06F 9/4893 (2013.01); G06F 9/5027 (2013.01); G06F 2209/483 (2013.01); G06F 2209/5011 (2013.01); Y02B 60/144 (2013.01);
Abstract
The disclosure relates to scheduling threads in a multicore processor. Executable transactions may be scheduled using at least one distribution queue, which lists executable transactions in order of eligibility for execution, and multilevel scheduler which comprises a plurality of linked individual executable transaction schedulers. Each of these includes a scheduling algorithm for determining the most eligible executable transaction for execution. The most eligible executable transaction is outputted from the multilevel scheduler to the at least one distribution queue.