The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2016

Filed:

Feb. 03, 2015
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Young-lyong Kim, Gunpo-si, KR;

Taehoon Kim, Seongnam-si, KR;

Jongho Lee, Hwaseong-si, KR;

Chul-Yong Jang, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 25/00 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76802 (2013.01); H01L 23/3135 (2013.01); H01L 23/3185 (2013.01); H01L 24/24 (2013.01); H01L 24/82 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 23/3121 (2013.01); H01L 2224/24146 (2013.01); H01L 2224/24225 (2013.01); H01L 2224/24226 (2013.01); H01L 2224/24227 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/76155 (2013.01); H01L 2224/82102 (2013.01); H01L 2224/92144 (2013.01); H01L 2225/06524 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/06568 (2013.01); H01L 2924/01012 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/181 (2013.01);
Abstract

A semiconductor package may include a substrate including a substrate connection terminal, at least one semiconductor chip stacked on the substrate and having a chip connection terminal, a first insulating layer covering at least portions of the substrate and the at least one semiconductor chip, and/or an interconnection penetrating the first insulating layer to connect the substrate connection terminal to the chip connection terminal. A semiconductor package may include stacked semiconductor chips, edge portions of the semiconductor chips constituting a stepped structure, and each of the semiconductor chips including a chip connection terminal; at least one insulating layer covering at least the edge portions of the semiconductor chips; and/or an interconnection penetrating the at least one insulating layer to connect to the chip connection terminal of each of the semiconductor chips.


Find Patent Forward Citations

Loading…