The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2016

Filed:

Mar. 11, 2014
Applicant:

Advantest Corporation, Tokyo, JP;

Inventors:

Michael Jones, San Carlos, CA (US);

Edmundo Delapuente, Cupertino, CA (US);

Alan S. Krech, Jr., Fort Collins, CO (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G11C 29/10 (2006.01); G11C 29/56 (2006.01); G01R 31/3183 (2006.01);
U.S. Cl.
CPC ...
G11C 29/10 (2013.01); G01R 31/318307 (2013.01); G01R 31/318342 (2013.01); G11C 29/56 (2013.01);
Abstract

A system for testing a device under test (DUT) includes a test controller unit that includes a first memory operable to store a data pattern; a bridge circuit that includes a second memory that is smaller than the first memory, and a functional unit that includes a third memory that is smaller than the second memory. Portions of the data pattern are selectively transferred from the first memory to the second memory during and for DUT testing operations. The functional circuit interfaces with the DUT for testing. Portions of the data pattern are selectively transferred from the second memory to the third memory for application to the DUT.


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