The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2016

Filed:

Jan. 10, 2014
Applicant:

Lenovo Enterprise Solutions (Singapore) Pte. Ltd., Singapore, SG;

Inventors:

Moises Cases, Austin, TX (US);

Tae Hong Kim, Round Rock, TX (US);

Rohan U. Mandrekar, Austin, TX (US);

Nusrat I. Sherali, Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/03 (2006.01); H05K 3/00 (2006.01); H05K 3/42 (2006.01); H05K 1/02 (2006.01); H05K 1/09 (2006.01); H05K 1/16 (2006.01); H05K 3/24 (2006.01);
U.S. Cl.
CPC ...
H05K 3/0094 (2013.01); H05K 1/0242 (2013.01); H05K 1/0251 (2013.01); H05K 3/0047 (2013.01); H05K 3/429 (2013.01); H05K 1/0234 (2013.01); H05K 1/09 (2013.01); H05K 1/167 (2013.01); H05K 3/244 (2013.01); H05K 2201/0391 (2013.01); Y10T 29/4913 (2015.01); Y10T 29/49126 (2015.01); Y10T 29/49155 (2015.01); Y10T 29/49165 (2015.01); Y10T 156/1057 (2015.01); Y10T 428/12528 (2015.01);
Abstract

Example multi-layer printed circuit boards ('PCBs') are described as well as methods of manufacturing a PCB. Embodiments include depositing upon layers of laminate printed circuit traces and joining the layers of laminate. Embodiments also include drilling at least one via hole through the layers of laminate and placing in the via hole a via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a second metal having a conductivity lower than the conductivity of copper.


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