The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2016

Filed:

Nov. 18, 2013
Applicants:

Senthilkumar Jayapal, Penang, MY;

Mark E. Schuelein, Chandler, AZ (US);

Deepak Bhatia, Santa Clara, CA (US);

Inventors:

Senthilkumar Jayapal, Penang, MY;

Mark E. Schuelein, Chandler, AZ (US);

Deepak Bhatia, Santa Clara, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/412 (2006.01); G11C 8/04 (2006.01); H03K 19/003 (2006.01); G11C 5/14 (2006.01); G11C 19/00 (2006.01);
U.S. Cl.
CPC ...
H03K 19/003 (2013.01); G11C 5/148 (2013.01); G11C 19/00 (2013.01);
Abstract

Described is an apparatus which comprises: a first memory unit having an input and an output, wherein the first memory unit operates on a first power supply which is operable to be turned off; a second memory unit having an input coupled to the output of the first memory unit, and an output, wherein the second memory unit operates on a second power supply which is always on; and a control logic coupled to the first and second memory units, the control logic to provide one or more control signals to each of the first and second memory units.


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