The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2016

Filed:

Feb. 26, 2014
Applicant:

Phison Electronics Corp., Miaoli, TW;

Inventors:

Wei Lin, Taipei, TW;

Shao-Wei Yen, Kaohsiung, TW;

Yu-Hsiang Lin, Yunlin County, TW;

Kuo-Hsin Lai, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); H03M 13/11 (2006.01); H03M 13/37 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1076 (2013.01); G06F 11/1072 (2013.01); H03M 13/1108 (2013.01); H03M 13/3707 (2013.01); G06F 11/1068 (2013.01); H03M 13/1102 (2013.01); H03M 13/1111 (2013.01);
Abstract

A decoding method, a memory storage device and a memory controlling circuit unit are provided. The decoding method includes: reading at least one memory cell according to a first read voltage to obtain at least one first verification bit; executing a hard bit mode decoding procedure according to the first verification bit, and determining whether a first valid codeword is generated by the hard bit mode decoding procedure; if the first valid codeword is not generated by the hard bit mode decoding procedure, obtaining storage information of the memory cell; deciding a voltage number according to the storage information; reading the memory cell according to second read voltages matching the voltage number to obtain second verification bits; and executing a soft bit mode decoding procedure according to the second verification bits. Accordingly, the speed of decoding is increased.


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