The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2016

Filed:

May. 09, 2014
Applicant:

Alpha and Omega Semiconductor Incorporated, Sunnyvale, CA (US);

Inventors:

Zhiqiang Niu, Santa Clara, CA (US);

Hua Pan, Shanghai, CN;

Ming-Chen Lu, Shanghai, CN;

Yueh-Se Ho, Sunnyvale, CA (US);

Jun Lu, San Jose, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/16 (2006.01); H01L 21/768 (2006.01); H01L 23/31 (2006.01); H01L 23/495 (2006.01); H01L 23/522 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 25/165 (2013.01); H01L 21/76877 (2013.01); H01L 23/3107 (2013.01); H01L 23/49503 (2013.01); H01L 23/49562 (2013.01); H01L 23/49568 (2013.01); H01L 23/49575 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 24/17 (2013.01); H01L 25/50 (2013.01); H01L 2224/16113 (2013.01); H01L 2224/16258 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/14 (2013.01);
Abstract

The present invention discloses a new embedded package comprising: a pre-mold lead frame with a plurality of chips attached thereon, where the molding material fills the voids of the lead frame, so that the lead frame is entirely solid; a plurality of pins arranged around the lead frame; a metal clip attached on and electrically connecting the chips together; first laminate layer which covers the chips, the lead frame, a metal clip and pins; conductive plug and extension formed to connect an electrode of a chip to a corresponding pin or to connect the chips together. The new embedded package of the invention with a three-dimensional stack capacity improves the thickness, thermal and electrical properties and the flexible power and logic hybrid design.


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