The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2016

Filed:

Aug. 28, 2014
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Deborah Jean Riley, Murphy, TX (US);

Judy Browder Shaw, Leonard, TX (US);

Christopher L. Hinkle, Richardson, TX (US);

Creighton T. Buie, Richardson, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 27/092 (2006.01); H01L 21/8238 (2006.01); H01L 29/47 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 27/092 (2013.01); H01L 21/823814 (2013.01); H01L 21/823871 (2013.01); H01L 29/47 (2013.01); H01L 29/7839 (2013.01); H01L 2924/12032 (2013.01); H01L 2924/1305 (2013.01); H01L 2924/13091 (2013.01);
Abstract

A method of fabricating Schottky barrier contacts for an integrated circuit (IC). A substrate including a silicon including surface is provided having a plurality of transistors formed thereon, where the plurality of transistors include at least one exposed p-type surface region and at least one exposed n-type surface region on the silicon including surface. A plurality of metals are deposited including Yb and Pt to form at least one metal layer on the substrate. The metal layer is heated to induce formation of an inhomogeneous silicide layer including both Ptsilicide and Ybsilicide on the exposed p-type and n-type surface regions.


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