The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2016

Filed:

Nov. 26, 2013
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Chun-Liang Shen, New Taipei, TW;

Ming-Yuan Wu, Hsinchu, TW;

Chiung-Han Yeh, Tainan, TW;

Kong-Beng Thei, Pao-Shan Vilage, TW;

Harry-Hak-Lay Chuang, Crescent, SG;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/544 (2006.01); H01L 21/3105 (2006.01); H01L 21/8238 (2006.01); H01L 23/58 (2006.01);
U.S. Cl.
CPC ...
H01L 23/544 (2013.01); H01L 21/31051 (2013.01); H01L 21/823828 (2013.01); H01L 23/585 (2013.01); H01L 2223/54426 (2013.01); H01L 2223/54453 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A semiconductor device is provided which includes a semiconductor substrate having a first region and a second region, the first and second regions being isolated from each other, a plurality of transistors formed in the first region, an alignment mark formed in the second region, the alignment mark having a plurality of active regions in a first direction, and a dummy gate structure formed over the alignment mark, the dummy gate structure having a plurality of lines in a second direction different from the first direction.


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