The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 2016

Filed:

Feb. 18, 2014
Applicant:

Kabushiki Kaisha Toshiba, Minato-Ku, Tokyo, JP;

Inventor:

Ichiro Mizushima, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/792 (2006.01); H01L 27/115 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7827 (2013.01); H01L 27/11582 (2013.01); H01L 29/66666 (2013.01); H01L 29/66833 (2013.01); H01L 29/7926 (2013.01);
Abstract

In one embodiment, a method of manufacturing a semiconductor device includes forming, on a semiconductor substrate, a sacrificial semiconductor pillar having a pillar-like shape extending in a first direction perpendicular to a main surface of the semiconductor substrate, and being formed of a first semiconductor material. The method further includes forming, around the sacrificial semiconductor pillar, a channel semiconductor layer having a tube-like shape extending in the first direction, and being formed of a second semiconductor material different from the first semiconductor material. The method further includes removing the sacrificial semiconductor pillar after the channel semiconductor layer is formed. The channel semiconductor layer is formed on electrode layers via an insulator, the electrode layers being formed on the semiconductor substrate.


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