The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 2016

Filed:

Mar. 25, 2014
Applicants:

Denis M. Khartikov, San Jose, CA (US);

John H. Kelm, Sunnyvale, CA (US);

Naveen Neelakantam, Mountain View, CA (US);

Inventors:

Denis M. Khartikov, San Jose, CA (US);

John H. Kelm, Sunnyvale, CA (US);

Naveen Neelakantam, Mountain View, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/14 (2006.01); G06F 9/30 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1435 (2013.01); G06F 9/30145 (2013.01);
Abstract

A checkpoint technique associated with an out of order based architecture of a processing device is described. An instruction may be received by its retirement unit and an identification as to whether the instruction is associated with a speculative error is performed. If the instruction is associated with the speculative error, then a first operation may be performed to replace state values of a first checkpoint of the processing device with state values of a second checkpoint. If the instruction is not associated with the speculative error, then the second checkpoint state may be updated based on the instruction.


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