The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 09, 2016
Filed:
Apr. 24, 2012
Ren Wang, Portland, OR (US);
Ahmad Samih, Beaverton, OR (US);
Christian Maciocco, Portland, OR (US);
Tsung-yuan Charlie Tai, Portland, OR (US);
James Jimbo Alexander, Hillsboro, OR (US);
Prashant R. Chandra, Santa Clara, CA (US);
Ren Wang, Portland, OR (US);
Ahmad Samih, Beaverton, OR (US);
Christian Maciocco, Portland, OR (US);
Tsung-Yuan Charlie Tai, Portland, OR (US);
James Jimbo Alexander, Hillsboro, OR (US);
Prashant R. Chandra, Santa Clara, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Methods and apparatus for implementing active interconnect link power management using an adaptive low-power link-state entry policy. The power state of an interconnect link or fabric is changed in response to applicable conditions determined by low-power link-state entry policy logic in view of runtime traffic on the interconnect link or fabric. The low-power link-state policy logic may be configured to include consideration of operating system input and Quality of Service (QoS) requirements for applications and devices employing the link or fabric, and device latency tolerance requirements.