The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 19, 2016

Filed:

Nov. 20, 2013
Applicant:

Besi Switzerland Ag, Cham, CH;

Inventors:

Ernst Barmettler, EmmenbrĂĽcke, CH;

Irving Rodriguez, Hermetschwil, CH;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B32B 38/10 (2006.01); H01L 21/67 (2006.01); B32B 43/00 (2006.01); H01L 21/683 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/67011 (2013.01); B32B 43/006 (2013.01); H01L 21/67132 (2013.01); H01L 21/67288 (2013.01); H01L 21/6836 (2013.01); H01L 24/75 (2013.01); H01L 2221/68381 (2013.01); H01L 2224/756 (2013.01); H01L 2224/75753 (2013.01); Y10S 156/932 (2013.01); Y10S 156/943 (2013.01); Y10T 156/1105 (2015.01); Y10T 156/1179 (2015.01); Y10T 156/1983 (2015.01);
Abstract

The invention relates to the prepeeling phase of methods for detaching a semiconductor chip from a foil. According to a first aspect, the invention relates to the determination of time periods, which each defines a duration of a prepeeling step. In a setup phase, the following steps are carried out for each prepeeling step: According to a second aspect, the detachment of the semiconductor chip from the foil is monitored in realtime.


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