The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 19, 2016
Filed:
Dec. 05, 2011
Seongwoo Kim, Beaverton, OR (US);
Jeremy Shrall, Portland, OR (US);
Jay D. Schwartz, Aloha, OR (US);
Stephen H. Gunther, Beaverton, OR (US);
Travis C. Furrer, Hillsboro, OR (US);
Seongwoo Kim, Beaverton, OR (US);
Jeremy Shrall, Portland, OR (US);
Jay D. Schwartz, Aloha, OR (US);
Stephen H. Gunther, Beaverton, OR (US);
Travis C. Furrer, Hillsboro, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
The efficiency rating (ER) of each domain, in a processor, may be compared and then the power budget may be allocated, effectively, among the domains based on the ERs of the domains. The ER may indicate relative advantage among domains in terms of performance return for a given power budget, i.e., a higher effectiveness may be expected in power utilization if the ER is higher for a domain. The ER of a domain may be defined as (scalability factor/cost factor*alpha). The scalability factor may be defined as a performance increase (in %) brought about by an increase in the clock frequency (in %) provided to the domain. The cost factor may be defined as a power budget value required in bringing about an increase in the clock frequency provided to the domain and alpha is an adjustment factor.