The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2016

Filed:

Oct. 28, 2009
Applicants:

Kyung Rok Kim, Suwon-si, KR;

Kyu-baik Chang, Seoul, KR;

Young Kwan Park, Suwon-si, KR;

Seung Chul Lee, Seongnam-si, KR;

Jin Kyu Park, Seoul, KR;

Inventors:

Kyung Rok Kim, Suwon-si, KR;

Kyu-Baik Chang, Seoul, KR;

Young Kwan Park, Suwon-si, KR;

Seung Chul Lee, Seongnam-si, KR;

Jin Kyu Park, Seoul, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06G 7/62 (2006.01); G06F 9/44 (2006.01); G06F 13/10 (2006.01); G06F 13/12 (2006.01); G06F 11/34 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5022 (2013.01); G06F 11/3476 (2013.01); G06F 13/105 (2013.01); G06F 17/5009 (2013.01);
Abstract

A unified simulation system is provided. The unified simulation system includes an input database storing input data comprising an input parameter and environment information, a unified simulator executing a unified process-device-circuit simulation of characteristics of a semiconductor apparatus based on the input data and at least one predetermined model and outputting a simulation result as output data, and an output database storing the output data. The unified simulator includes a process simulator simulating at least one process based on the input data and outputting process characteristic data, a device simulator simulating at least one device based on the process characteristic data and outputting device characteristic data, and a circuit simulator simulating a circuit comprising the at least one device. Accordingly, multiple devices can be simultaneously optimized for the optimization of circuit characteristics and an accurate specification at process and device levels can be provided.


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